Chapter 26: The Sample Clock and the Transfer Clock: Why Phase Locking Matters in CCD Barcode Scanners |
Summary: This chapter examines the critical relationship between the CCD shift register's transfer clock and the analog-to-digital converter's sample clock in barcode scanning systems. It explains why these two clocks must be phase-locked to prevent sampling artifacts that would corrupt the digital representation of the barcode waveform. Through concrete examples drawn from retail point-of-sale systems, logistics and warehousing operations, healthcare patient identification, manufacturing quality control, and library asset management, the chapter demonstrates how improper clock synchronization manifests as real-world scanning failures. The discussion then explores how phase locking is achieved in practical scanner designs and concludes with a comprehensive summary of the engineering principles and application implications. |
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1. The Moment of Conversion: Where Analog Becomes Digital |
The correlated double sampling circuit has done its work. It has extracted a clean, difference-based representation of each pixel's charge from the CCD's output, canceling the reset noise that would otherwise obscure the subtle variations between black bars and white spaces. What emerges from the CDS stage is an analog voltage that, if plotted over time, traces the silhouette of the barcode: a sequence of plateaus and transitions corresponding to the alternating dark and light elements the scanner's lens has projected onto the sensor array . This analog signal is continuous in time and continuous in amplitude, a faithful electrical shadow of the printed symbol. |
But the decoder cannot work with shadows. The microprocessor or ASIC that will ultimately interpret the barcode requires discrete numbers, binary values that represent the brightness at specific, well-defined instants. The analog-to-digital converter performs this translation. It accepts the analog voltage from the CDS stage and, at each tick of its sample clock, produces a digital word. In a typical barcode scanner, this word is eight to twelve bits wide, meaning the ADC can distinguish between 256 and 4096 discrete brightness levels . The ADC operates at rates of several megasamples per second, fast enough to capture the finest bars and spaces as the scanner sweeps across the symbol. |
The ADC's output feeds the digital signal processing chain. Each sample becomes a point in the digitized waveform. The decoder then examines this waveform, identifies the peaks and valleys that correspond to bars and spaces, measures their widths in time, and reconstructs the encoded characters. Every subsequent stage in the signal chain depends on the fidelity of those samples. If the ADC samples at the wrong moments, or if the moments themselves are inconsistent from pixel to pixel, the digital representation will not match the analog reality. The barcode that was perfectly printed may appear distorted, its bars widened or narrowed, its spaces collapsed or exaggerated. The decoder will either reject the symbol or, worse, misread it. |
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2. The CCD Transfer Clock: The Metronome of Charge |
To understand why the ADC's sample clock must be locked to something else, we must first understand what that 'something else' is. The CCD sensor in a barcode scanner is not a passive device that continuously reports brightness values. It is a sequential machine. Photons accumulate as charge in each pixel's potential well during an exposure period. Then, at the end of that period, a readout gate pulse transfers the accumulated charge packets into an analog shift register . From that point, the charge packets march single file toward the output amplifier, one pixel at a time, propelled by the alternating phases of the transfer clock. |
This transfer clock, sometimes called the pixel clock or the CCD drive clock, sets the tempo for the entire readout process. Each cycle of the transfer clock moves one charge packet one step closer to the output. When a packet reaches the output node, the amplifier converts its charge into a voltage. The CDS circuit then samples this voltage, first during the reset level and then during the signal level, taking the difference between the two to cancel noise . The CDS output, as we have said, is the analog signal that the ADC must digitize. |
The critical insight is this: the analog signal at the CDS output is not a continuous, arbitrary waveform. It is a discrete-time signal whose values change in synchrony with the transfer clock. Each pixel's voltage is valid only during a specific window of time, defined by the transfer clock's phase. Between these windows, the signal may be settling, transitioning, or otherwise invalid. If the ADC samples during an invalid window, it captures noise or a partially settled value rather than the true pixel voltage. The resulting digital number is meaningless. |
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3. The Anatomy of a Sampling Artifact |
Sampling artifacts in CCD barcode scanners take several forms, each with distinct consequences for decoding performance. The most straightforward is the sampling phase error. Suppose the ADC's sample clock runs at the correct frequency but with a constant phase offset relative to the transfer clock. The ADC consistently samples each pixel slightly too early or slightly too late. If the offset is small, the captured voltage may still be close to the true value, and the scanner may function adequately under benign conditions. But as the phase error grows, the sampled voltage drifts toward the transition between pixels. At a phase error approaching half a pixel period, the ADC may capture the boundary between two adjacent pixels, producing a value that belongs to neither. A black bar followed immediately by a white space could be digitized as two intermediate gray values, erasing the sharp edge that the decoder relies upon to locate bar boundaries. |
A more insidious artifact arises from frequency mismatch. If the ADC's sample clock frequency differs even slightly from the CCD transfer clock frequency, the phase relationship between the two clocks drifts continuously over time. A scan line that begins with perfect sampling phase may, by the end of the line, have accumulated enough phase error to sample entire pixels in the wrong position. The effect is analogous to a slow-motion aliasing: the digitized barcode waveform appears to stretch or compress along the scan direction. For a scanner reading a symbol with many characters, the accumulated distortion can cause the later characters to be misread even as the earlier ones decode correctly. This is particularly problematic in long barcodes such as those used on shipping labels or pharmaceutical packaging, where a single misread character can invalidate the entire transaction. |
A third artifact, less obvious but equally damaging, is the interaction between sampling phase and pixel-to-pixel variations. Even with a nominally locked clock, if the phase relationship is not rigidly maintained, cycle-to-cycle jitter in either clock can cause each pixel to be sampled at a slightly different point in its settling trajectory. The result is a digitized waveform with a characteristic 'noisy' appearance, as if the barcode were printed on textured paper. The decoder's thresholding algorithms must then work harder to distinguish true bar-space transitions from sampling noise. In marginal conditions---a slightly blurred image, a low-contrast symbol, a scuffed label---this added noise can push the decoder past its error-correction limits . |
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4. Why Phase Locking Solves the Problem |
Phase locking is the engineering answer to a fundamental question: how do you ensure that two oscillators, one driving the CCD and one driving the ADC, maintain a fixed, predictable relationship over timeThe answer is to derive one from the other. In a phase-locked system, a single master clock source generates the timing reference for both the CCD transfer signals and the ADC sample clock . A phase-locked loop, or PLL, multiplies or divides this master clock as needed, producing the various frequencies required by different parts of the system while preserving a known phase relationship between them. |
In the context of a barcode scanner, the typical architecture works as follows. A pixel rate oscillator generates a fundamental clock at the CCD's readout frequency. A PLL multiplies this frequency by an integer factor N to produce a high-frequency master clock . This master clock then drives a clock generation circuit that produces the multi-phase CCD drive signals---the transfer clocks that actually move charge through the shift register---along with the CDS clamp and sample clocks, and the ADC's sample clock. Because all of these signals are derived from the same master clock through digital division and phase generation, their relative timing is fixed by design. The ADC sample clock and the CCD transfer clock are not merely running at the same frequency; they are rigidly locked in phase, with a constant offset that can be precisely controlled. |
This rigidity is the key. It means that the sampling instant can be placed at the optimal point within each pixel's valid window, and it will stay there regardless of temperature drift, supply voltage variation, or component aging. The PLL's feedback loop continuously corrects any tendency of the voltage-controlled oscillator to drift, comparing its output phase to the reference and adjusting accordingly . The result is a sampling clock that tracks the CCD's readout rhythm with a precision measured in nanoseconds or better. |
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5. Retail Point-of-Sale: The Checkout Lane as a Timing Laboratory |
The retail checkout counter is perhaps the most demanding environment for barcode scanning in everyday life. A cashier sweeps a product across the scanner window at an unpredictable speed and angle. The barcode may be curved around a cylindrical package, partially obscured by a price sticker, or printed with less-than-ideal contrast on recycled cardboard. The scanner must decode the symbol in a fraction of a second, because the customer is waiting and the line is growing. |
In this environment, sampling phase errors manifest in ways that are immediately visible to the operator and the customer. A scanner with marginal clock synchronization may work perfectly on flat, high-contrast labels but fail repeatedly on the shrink-wrapped produce items or the soft, curved surfaces of bagged snacks. The cashier may find themselves repositioning the item, trying different angles, or manually keying in the price. Each failed scan adds seconds to the transaction and erodes confidence in the technology. |
The phase-locked architecture provides a margin of robustness that becomes apparent precisely when conditions are difficult. Because the ADC samples each pixel at the optimal instant, the digitized waveform preserves the maximum possible contrast between bars and spaces. When the barcode is slightly blurred due to motion or poor focus, the clean sampling still captures enough edge information for the decoder's algorithms to work with. When the contrast is low because the label is faded or the lighting is uneven, the full dynamic range of the ADC is available to resolve the subtle differences. A scanner with poor clock synchronization, by contrast, may produce a digitized waveform that is already degraded before any decoding algorithm has a chance to operate. |
The modern retail environment also demands speed. High-performance CCD scanners can achieve scan rates of 270 scans per second or more . At these rates, the timing margins shrink accordingly. The ADC must capture each pixel with precision at megasample rates, and any phase jitter becomes a larger fraction of the pixel period. Phase locking ensures that the sampling instant remains stable even as the scan rate increases. |
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6. Logistics and Warehousing: Scanning in Motion |
Warehouse and logistics operations present a different set of challenges. Packages move along conveyor belts at speeds of a meter per second or more. Forklift operators scan pallet labels from a distance while seated in the driver's seat. Dock workers scan shipping labels on boxes that are stacked awkwardly or partially crushed. In these environments, the scanner is not a precision instrument used by a trained operator at a stationary counter; it is a rugged tool expected to function despite rough handling, variable lighting, and motion blur. |
The phase relationship between the ADC and the CCD becomes particularly important when scanning at a distance. A scanner reading a barcode from forty centimeters away, such as the Hyperion 1300g with its 46-centimeter reading distance, projects a smaller image onto the sensor . The individual bars and spaces occupy fewer pixels. The digitized waveform has fewer samples per bar width, and each sample carries more weight in the decoder's reconstruction. A sampling phase error that would be tolerable at close range---where a bar spans many pixels---can become catastrophic at a distance, where a bar spans only a few pixels and a single misplaced sample can shift the apparent boundary between a bar and a space. |
Consider the scenario of a warehouse worker scanning a shipping label on a pallet stacked three meters high. The scanner must resolve the narrow bars of a Code 128 symbol at a distance where each bar subtends only a small angular width. The lens focuses this image onto the CCD array, where the bars occupy perhaps three or four pixels each. The ADC samples each pixel once. If the sample clock is phase-locked to the transfer clock, each of those three or four samples lands squarely within its pixel's valid window, and the decoder receives a clean representation of the bar. If the clocks are independent, the samples may land near pixel boundaries, producing values that blend adjacent bars and spaces. The decoder sees a blurred symbol and may fail to decode it, forcing the worker to climb down from the forklift and approach the pallet on foot---a costly interruption in a workflow measured in packages per hour. |
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7. Healthcare: Patient Safety and the Cost of a Misread |
In healthcare settings, barcode scanning is not merely a convenience; it is a safety mechanism. Nurses scan patient wristbands before administering medication. Pharmacists scan drug packages to verify that the correct medication is being dispensed. Laboratory technicians scan specimen tubes to ensure that test results are associated with the correct patient. In these applications, a misread is not a minor annoyance that can be corrected by rescanning. A barcode that decodes to the wrong patient identifier, or that fails to decode and prompts a manual override, can contribute to a medication error with serious consequences. |
The scanning conditions in a hospital are often less than ideal. Patient wristbands are printed on flexible, curved materials that wrap around the wrist. They may be wrinkled, soiled, or partially obscured by a sleeve or a medical device. Medication packages come in an enormous variety of shapes, sizes, and label designs, many of which were not optimized for scanner readability. The lighting in a patient room at night is dim and uneven. |
In this context, the integrity of the digitized waveform is not an abstract engineering concern. It is a direct contributor to patient safety. A phase-locked scanner architecture ensures that every pixel of every scan line is sampled at the correct instant, maximizing the chance that the decoder receives a clean, unambiguous representation of the barcode. When a nurse scans a wristband that is slightly wrinkled, the phase-locked system captures the subtle variations in bar width that encode the patient identifier, even as the wrinkles introduce local distortions. When a medication package has a low-contrast label printed on a reflective surface, the full ADC resolution is available to resolve the bars from the background. |
The alternative---a scanner with independent ADC and CCD clocks---introduces a source of variability that is entirely unnecessary. The scan may succeed on one attempt and fail on the next, not because the barcode or the conditions changed, but because the phase relationship between the two clocks happened to drift into a favorable or unfavorable region. In a safety-critical application, such nondeterminism is unacceptable. Phase locking eliminates it. |
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8. Manufacturing and Quality Control: Traceability at Production Speed |
On a manufacturing line, barcodes serve as the thread that connects raw materials to finished products, enabling traceability from supplier to customer. A scanner reading a component's barcode at a production station confirms that the correct part is being installed. A scanner reading a finished product's label records its serial number and test results. A scanner reading a shipping container's barcode verifies that the correct quantity of products is being dispatched. |
These scans occur at production speed, often triggered automatically as parts move past a fixed-mount scanner on a conveyor. There is no human operator to reposition the item or retry the scan. The scanner gets one chance, and if it fails, the production line may stop or the part may be routed to a rework station. The cost of a failed scan is measured in downtime and lost throughput. |
Fixed-mount CCD scanners in manufacturing environments face specific challenges. The barcode may be printed directly on a metal surface with low contrast. The part may be moving at a constant but substantial speed, introducing motion blur that the CCD's exposure time must accommodate. The ambient lighting may include flickering fluorescent tubes or intense LED work lights that introduce periodic variations in illumination. |
In this environment, the phase-locked sampling architecture contributes to reliability in several ways. First, the fixed phase relationship ensures that the sampling instant is consistent from scan to scan, so that the digitized waveform is reproducible even as the part moves past the scanner. Second, because the ADC samples each pixel at its optimal point, the full contrast of the barcode is preserved in the digital domain, giving the decoder the best possible signal-to-noise ratio to work with. Third, the PLL's jitter rejection---its ability to maintain a stable output despite noise on the reference clock---translates directly into sampling stability. In a factory environment where electrical noise is abundant, this stability is essential. |
A concrete example illustrates the point. Consider a scanner reading a Data Matrix code laser-etched onto a machined aluminum component. The code's modules are small and the contrast between etched and unetched surfaces is modest. The scanner's CCD captures the reflected light, and the CDS circuit extracts the signal. If the ADC samples each pixel at the correct instant, the digitized image preserves the subtle differences between modules and background, and the decoder can extract the encoded data. If the sampling phase is off, the modules blur into their neighbors, and the decoder fails. The difference between a functioning traceability system and a production bottleneck may hinge on a few nanoseconds of clock phase. |
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9. Libraries and Asset Management: High-Density Symbols on Demanding Surfaces |
Libraries were among the earliest adopters of barcode technology for circulation management, and they remain a significant market for CCD scanners. A library barcode is typically a high-density symbology printed on a small label affixed to a book's cover or inside page. The label may be covered by a protective film that reflects light unevenly. The book may be worn, with the label partially peeled or scuffed. The scanner must read the barcode quickly, often while the librarian is simultaneously handling the book and interacting with a patron. |
The high-density nature of library barcodes means that each character occupies a small physical space, and the scanner's CCD array must resolve fine bar and space widths. In a phase-locked system, the ADC samples each pixel at the optimal instant, preserving the sharp edges between bars and spaces. The decoder can then accurately measure the widths and reconstruct the encoded number. In a system with poor clock synchronization, the digitized waveform may exhibit apparent widening or narrowing of bars, causing the decoder to misinterpret the symbol. The librarian may need to rescan the book, or may manually key in the barcode number---a process that is both slower and more error-prone. |
Asset management in corporate and institutional settings presents similar challenges. IT departments scan equipment barcodes to track laptops, monitors, and peripherals. Facilities teams scan asset tags on furniture and machinery. These tags are often small, printed on durable materials, and subjected to years of wear. The phase-locked scanner architecture provides the margin of reliability that allows these workflows to function smoothly, without requiring users to become experts in scanner technique. |
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10. How Phase Locking Is Achieved in Practice |
The engineering implementation of phase locking in a CCD barcode scanner revolves around the clock generation and distribution network. A typical design begins with a crystal oscillator that provides a stable reference frequency. This reference drives a PLL integrated circuit or a PLL block within an ASIC. The PLL multiplies the reference to a higher frequency, and a clock generation state machine then divides and phases this master clock to produce all the required timing signals . |
The CCD requires multiple clock phases, often two or three, to transfer charge efficiently through the shift register. These phases must have precise non-overlapping relationships to prevent charge from smearing backward. The CDS circuit requires a clamp clock and a sample clock, timed to coincide with the reset level and the signal level of each pixel's output waveform. The ADC requires a conversion clock that defines when each sample is taken. All of these signals are generated from the same master clock, with their relative phases set by digital delay elements or by the inherent division logic of the clock generator. |
The PLL itself is a feedback system. A phase detector compares the phase of the voltage-controlled oscillator's output (after division) to the reference clock. The resulting error signal, filtered by a loop filter, adjusts the VCO's frequency to minimize the phase difference . The loop bandwidth is chosen to reject high-frequency noise while tracking low-frequency drift. In a barcode scanner, the PLL must be stable enough to maintain phase lock despite temperature variations and supply noise, yet agile enough to lock quickly when the scanner is powered on or when the scan rate changes. |
An alternative to the PLL is the delay-locked loop, or DLL, which achieves phase alignment by inserting a controlled delay rather than by adjusting an oscillator frequency. DLLs can offer advantages in jitter performance and lock time, but PLLs remain more common in cost-sensitive consumer scanner designs. Some integrated analog front-end chips for scanner applications include the PLL and clock generation circuitry on-chip, simplifying the design and reducing board space . |
The physical layout of the clock distribution network also matters. The CCD transfer clock and the ADC sample clock must arrive at their respective destinations with minimal skew. PCB traces carrying these signals are routed with matched lengths and controlled impedances. Ground planes provide return paths that minimize loop inductance and crosstalk. In high-speed designs, the clock signals may be differential to improve noise immunity. These layout considerations are not unique to barcode scanners, but they take on particular importance because the entire signal chain's performance depends on the integrity of the timing. |
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11. When Phase Locking Fails: Symptoms and Diagnostics |
Despite the best design efforts, phase locking can fail in the field. Understanding the symptoms helps technicians and engineers diagnose problems and design more robust systems. The most common failure mode is a loss of lock in the PLL, often caused by a noisy or inadequate power supply, a failing crystal oscillator, or electromagnetic interference coupled onto the reference clock line. When the PLL loses lock, the ADC sample clock may drift freely relative to the CCD transfer clock, and the scanner's decoding performance degrades unpredictably. The scanner may work intermittently, succeeding on some scans and failing on others without any apparent change in the barcode or the environment. |
A more subtle failure mode is increased jitter without complete loss of lock. The PLL maintains phase alignment on average, but the instantaneous phase wanders from sample to sample. This jitter can be caused by power supply noise, ground bounce, or crosstalk from nearby digital signals. The effect on decoding is a gradual degradation of the digitized waveform's quality. The scanner still works on high-quality barcodes under favorable conditions, but its margin for error shrinks. Barcodes that were previously readable at a distance or at an angle now require the scanner to be held closer or more squarely. The user may perceive the scanner as 'getting old' or 'losing sensitivity' when in fact the clock jitter has increased. |
Temperature effects can also cause phase drift if the clock generation circuitry is not adequately compensated. The propagation delays through logic gates and PCB traces change with temperature, and if the CCD and ADC clock paths experience different temperature coefficients, their relative phase may shift as the scanner warms up or cools down. A scanner that works perfectly in a climate-controlled office may fail in a refrigerated warehouse or in direct sunlight. Careful design accounts for these effects by matching delay characteristics along clock paths and by using temperature-compensated components where necessary. |
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12. The Broader Principle: Synchronization as a Design Philosophy |
The requirement that the ADC sample clock be phase-locked to the CCD transfer clock is a specific instance of a broader principle that runs through all of mixed-signal design: when a signal is sampled, the sampling instant must be defined with respect to the signal's own timing, not with respect to an independent reference. The CCD's output is a discrete-time signal in disguise. Its values are meaningful only within windows defined by the transfer clock. The ADC must respect those windows, and the only way to guarantee that respect across all operating conditions is to derive the sampling clock from the same source that defines the windows. |
This principle has implications beyond the ADC itself. The digital signal processing that follows the ADC may use data valid signals, frame syncs, or other timing markers that are ultimately derived from the CCD's readout sequence. If the entire chain---from the transfer clock through the CDS sample clock, the ADC sample clock, and the downstream digital timing---is locked to a single master reference, the system behaves as a coherent whole. Data from different pixels can be compared and combined with confidence. The decoder's algorithms can assume that the sample values they receive are properly aligned with the physical bars and spaces they represent. |
When this coherence is absent, the system becomes a collection of loosely coupled subsystems, each with its own timing quirks. Debugging becomes difficult because the symptoms change with temperature, time, and the specific barcode being scanned. Performance margins shrink, and field reliability suffers. The phase-locked architecture is not merely a good practice; it is the foundation upon which reliable barcode scanning is built. |
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13. Comprehensive Summary |
This chapter has examined the critical interface between the analog and digital domains in CCD barcode scanners: the moment when the correlated double sampling circuit's output is digitized by the analog-to-digital converter. The central argument is that the ADC's sample clock must be phase-locked to the CCD's transfer clock to prevent sampling artifacts that would corrupt the digital representation of the barcode waveform. |
The CCD transfer clock defines when each pixel's charge packet reaches the output amplifier and when the CDS circuit can validly sample it. The ADC must sample the CDS output at instants that fall within these valid windows. If the ADC's clock is independent, phase drift and jitter cause samples to land at incorrect points in the pixel period, producing digitized values that blend adjacent pixels, blur bar-space boundaries, and introduce apparent noise into the waveform. These artifacts degrade decoding performance in ways that are often intermittent and difficult to diagnose. |
The engineering solution is to derive all timing signals from a single master clock through a phase-locked loop. The PLL multiplies a stable reference frequency and a clock generation circuit produces the CCD drive phases, the CDS clamp and sample clocks, and the ADC conversion clock with fixed, predictable relationships. This architecture ensures that the sampling instant remains stable across temperature, supply voltage, and component aging, preserving the full fidelity of the barcode signal in the digital domain. |
The practical importance of phase locking becomes evident through the diverse application scenarios examined in this chapter. In retail point-of-sale scanning, phase locking provides the margin needed to read curved, wrinkled, or low-contrast labels at checkout speed. In logistics and warehousing, it enables reliable scanning at a distance and in motion, where each bar may span only a few pixels. In healthcare, it contributes directly to patient safety by maximizing the reliability of wristband and medication scans that must succeed on the first attempt. In manufacturing quality control, it supports traceability systems that operate at production speed without human intervention. In library and asset management, it ensures that high-density symbols on worn labels remain readable. |
The failure modes of phase locking---loss of lock, increased jitter, temperature-induced phase drift---manifest as intermittent decoding failures, reduced reading range, and sensitivity to scan angle. Understanding these symptoms helps in diagnosing field failures and in designing more robust timing architectures. |
Ultimately, the phase-locked sample clock is a quiet but essential element of the CCD scanner's design. It does not appear in the user interface or the marketing specifications. But it is the mechanism that transforms the CCD's sequential charge packets into a coherent digital representation of the barcode, one sample at a time, with a precision that the decoder depends upon and the user never sees. From the checkout lane to the hospital ward to the factory floor, the integrity of that transformation determines whether the photon-to-bit journey ends in a successful decode or a frustrating failure. |
cs@easiersoft.com